PCI-X to RapidIO Bridge ASIC:
• Development of Bridge ASIC for fabless semiconductor firm
• Bridge ASIC functionality included: 64 bit capable PCI/PCI-X interface. 8 bit full duplex RapidIO interface.I2C interface Secondary PCI arbiter. Hot plug controller. PCI Bridge Control and status registers. JTAG Controller.
• Development of IP and test environment done in Verilog.
• Performed: System Architecture. IP Architecture. Design. Verilog Coding. Test Synthesis. Functional Verification ~(150k lines)
• Operational first pass silicon