radar IQ data INTerface and pre-processor:
• CCA and System interfacing Radar data stream to Real-Time processing system was implemented in hardware with seven FPGAs. Project was taken from system analysis to deployment in fifteen months and is currently deployed in all aircraft.
• Performed: Analysis of DSP Input Processing requirements in upgrade to J-Stars Airborne Radar. Based on system analysis: Electrical, Mechanical, FPGA design IO Processing CCA. Diagnostic SW development.
• FPGAs - Altera, Xilinx
• Raceway++ Interface